"Stuck-at-fault testing for quasi-delay-insensitive logic circuits."

Arthit Thongtak, Takashi Nanya (1998)

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DOI: 10.1002/(SICI)1520-684X(199802)29:2<19::AID-SCJ3>3.0.CO;2-T

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type: Journal Article

metadata version: 2023-09-13

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Arthit Thongtak, Takashi Nanya:
Stuck-at-fault testing for quasi-delay-insensitive logic circuits. Syst. Comput. Jpn. 29(2): 19-27 (1998)

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