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"DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs."

Pedro Reviriego et al. (2016)

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DOI: 10.1016/J.MICROREL.2016.06.019

access: closed

type: Journal Article

metadata version: 2020-10-26

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  - https://dblp.org/rec/journals/mr/ReviriegoDTRM16
Pedro Reviriego, Mustafa Demirci, Jesús Tabero, Alberto Regadío, Juan Antonio Maestro:
DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs. Microelectron. Reliab. 63: 314-318 (2016)

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