"Optimization of on-chip ESD protection structures for minimal parasitic ..."

Xiaofang Gao et al. (2003)

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DOI: 10.1016/S0026-2714(03)00026-X

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type: Journal Article

metadata version: 2020-02-22

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Xiaofang Gao, Juin J. Liou, Joe Bernier, Gregg D. Croft, Waisum Wong, Satya Vishwanathan:
Optimization of on-chip ESD protection structures for minimal parasitic capacitance. Microelectron. Reliab. 43(5): 725-733 (2003)

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