default search action
"High speed and efficient area optimal ate pairing processor implementation ..."
Anissa Sghaier et al. (2018)
- Anissa Sghaier, Zeghid Medien, Loubna Ghammam, Sylvain Duquesne, Mohsen Machhout, Hassan Yousif Ahmed:
High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA. Microprocess. Microsystems 61: 227-241 (2018)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.