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"General memory efficient packet matching FPGA architecture for future ..."
Michal Kekely, Lukás Kekely, Jan Korenek (2020)
- Michal Kekely, Lukás Kekely, Jan Korenek:
General memory efficient packet matching FPGA architecture for future high-speed networks. Microprocess. Microsystems 73: 102950 (2020)
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