"Next generation of Exascale-class systems: ExaNeSt project and the status ..."

Manolis Katevenis et al. (2018)

> Home

Details and statistics

DOI: 10.1016/J.MICPRO.2018.05.009

access: closed

type: Journal Article

metadata version: 2022-03-16

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mam/KatevenisABCFCL18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mam/KatevenisABCFCL18
Manolis Katevenis, Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Bernd Lietzow, Martin L. Kersten:
Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development. Microprocess. Microsystems 61: 58-71 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.