"A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based ..."

Kevin Zhang et al. (2006)

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DOI: 10.1109/JSSC.2005.859025

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type: Journal Article

metadata version: 2024-04-26

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Kevin Zhang, Uddalak Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel Murray, Narendra Vallepalli, Yih Wang, Bo Zheng, Mark Bohr:
A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply. IEEE J. Solid State Circuits 41(1): 146-151 (2006)

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