"A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS."

Benwei Xu, Yuan Zhou, Yun Chiu (2017)

> Home

Details and statistics

DOI: 10.1109/JSSC.2016.2642204

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/XuZC17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/XuZC17
Benwei Xu, Yuan Zhou, Yun Chiu:
A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS. IEEE J. Solid State Circuits 52(4): 1091-1100 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.