"An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS."

Sriram R. Vangal et al. (2008)

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DOI: 10.1109/JSSC.2007.910957

access: closed

type: Journal Article

metadata version: 2022-04-20

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Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Vasantha Erraguntla, Clark Roberts, Yatin Vasant Hoskote, Nitin Borkar, Shekhar Borkar:
An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. IEEE J. Solid State Circuits 43(1): 29-41 (2008)

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