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"A multipage cell architecture for high-speed programming multilevel NAND ..."
Ken Takeuchi, Tomoharu Tanaka, Toru Tanzawa (1998)
- Ken Takeuchi, Tomoharu Tanaka, Toru Tanzawa:
A multipage cell architecture for high-speed programming multilevel NAND flash memories. IEEE J. Solid State Circuits 33(8): 1228-1238 (1998)
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