"A 9-ns 1-Mbit CMOS SRAM."

Katsuro Sasaki et al. (1989)

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DOI: 10.1109/JSSC.1989.572583

access: closed

type: Journal Article

metadata version: 2024-11-12

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Katsuro Sasaki, Koichiro Ishibashi, Toshiaki Yamanaka, Naotaka Hashimoto, Takashi Nishida, Katsuhiro Shimohigashi, Shoji Hanamura, Shigeru Honjo:
A 9-ns 1-Mbit CMOS SRAM. IEEE J. Solid State Circuits 24(5): 1219-1225 (1989)

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