"A 50-mW/ch 2.5-Gb/s/ch data recovery circuit for the SFI-5 interface with ..."

Yoshio Miki et al. (2004)

> Home

Details and statistics

DOI: 10.1109/JSSC.2004.824704

access: closed

type: Journal Article

metadata version: 2022-08-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/MikiSYYBKS04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/MikiSYYBKS04
Yoshio Miki, Tatsuya Saito, Hiroki Yamashita, Fumio Yuki, Takashige Baba, Akio Koyama, Masahito Sonehara:
A 50-mW/ch 2.5-Gb/s/ch data recovery circuit for the SFI-5 interface with digital eye-tracking. IEEE J. Solid State Circuits 39(4): 613-621 (2004)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.