"A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques."

Takuji Miki et al. (2015)

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DOI: 10.1109/JSSC.2015.2417803

access: closed

type: Journal Article

metadata version: 2020-08-30

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Takuji Miki, Takashi Morie, Kazuo Matsukawa, Yoji Bando, Takeshi Okumoto, Koji Obata, Shiro Sakiyama, Shiro Dosho:
A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques. IEEE J. Solid State Circuits 50(6): 1372-1381 (2015)

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