"A 0.7 V Single-Supply SRAM With 0.495 µm2 Cell in 65 nm ..."

Keiichi Kushida et al. (2009)

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DOI: 10.1109/JSSC.2009.2014009

access: closed

type: Journal Article

metadata version: 2020-08-30

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Keiichi Kushida, Azuma Suzuki, Gou Fukano, Atsushi Kawasumi, Osamu Hirabayashi, Yasuhisa Takeyama, Takahiko Sasaki, Akira Katayama, Yuki Fujimura, Tomoaki Yabe:
A 0.7 V Single-Supply SRAM With 0.495 µm² Cell in 65 nm Technology Utilizing Self-Write-Back Sense Amplifier and Cascaded Bit Line Scheme. IEEE J. Solid State Circuits 44(4): 1192-1198 (2009)

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