"A high-speed parallel sensing architecture for multi-megabit flash E/sup ..."

Kiyoteru Kobayashi et al. (1990)

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DOI: 10.1109/4.50288

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type: Journal Article

metadata version: 2025-01-23

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Kiyoteru Kobayashi, Tatsuo Nakayama, Yoshikazu Miyawaki, Masanori Hayashikoshi, Yasushi Terada, Tsutomu Yoshihara:
A high-speed parallel sensing architecture for multi-megabit flash E/sup 2/PROMs. IEEE J. Solid State Circuits 25(1): 79-83 (1990)

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