"Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic ..."

Haram Ju et al. (2022)

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DOI: 10.1109/JSSC.2022.3189663

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type: Journal Article

metadata version: 2022-10-02

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Haram Ju, Kwangho Lee, Kwanseo Park, Woosong Jung, Deog-Kyoon Jeong:
Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector. IEEE J. Solid State Circuits 57(10): 3014-3024 (2022)

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