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"High-bit-rate low-power decision circuit using InP-InGaAs HBT technology."

Kiyoshi Ishii et al. (2005)

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DOI: 10.1109/JSSC.2005.847521

access: closed

type: Journal Article

metadata version: 2023-09-30

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  - https://dblp.org/rec/journals/jssc/IshiiNSMIKHSE05
Kiyoshi Ishii, Hideyuki Nosaka, Kimikazu Sano, Koichi Murata, Minoru Ida, Kenji Kurishima, Michihiro Hirata, Tsugumichi Shibata, Takatomo Enoki:
High-bit-rate low-power decision circuit using InP-InGaAs HBT technology. IEEE J. Solid State Circuits 40(7): 1583-1588 (2005)

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