"A high-speed sensing scheme for 1T dynamic RAMs utilizing the clamped ..."

Travis N. Blalock, Richard C. Jaeger (1992)

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DOI: 10.1109/4.126552

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type: Journal Article

metadata version: 2025-02-03

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Travis N. Blalock, Richard C. Jaeger:
A high-speed sensing scheme for 1T dynamic RAMs utilizing the clamped bit-line sense amplifier. IEEE J. Solid State Circuits 27(4): 618-625 (1992)

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