"A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor."

Bradley J. Benschneider et al. (1989)

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DOI: 10.1109/JSSC.1989.572606

access: closed

type: Journal Article

metadata version: 2024-11-12

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Bradley J. Benschneider, William J. Bowhill, Elizabeth M. Copper, Moshe Gavrielov, Paul E. Gronowski, Vijay K. Maheshwari, Victor Peng, Jeffrey D. Pickholtz, Sridhar Samudrala:
A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor. IEEE J. Solid State Circuits 24(5): 1317-1323 (1989)

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