"Ultra-Low-Leakage and High-Performance Logic Circuit Design Using ..."

Sourindra M. Chaudhuri, Niraj K. Jha (2016)

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DOI: 10.1145/2832913

access: closed

type: Journal Article

metadata version: 2025-01-19

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Sourindra M. Chaudhuri, Niraj K. Jha:
Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETs. ACM J. Emerg. Technol. Comput. Syst. 12(4): 43:1-43:25 (2016)

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