"Low-power design techniques for scaled technologies."

Bipul Chandra Paul, Amit Agarwal, Kaushik Roy (2006)

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DOI: 10.1016/J.VLSI.2005.12.001

access: closed

type: Journal Article

metadata version: 2020-02-20

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Bipul Chandra Paul, Amit Agarwal, Kaushik Roy:
Low-power design techniques for scaled technologies. Integr. 39(2): 64-89 (2006)

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