"A computer-aided design framework for modeling and simulation of VLSI ..."

Pochang Hsu, Jerzy W. Rozenblit (1994)

> Home

Details and statistics

DOI: 10.1016/0167-9260(94)00010-7

access: closed

type: Journal Article

metadata version: 2020-02-20

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/integration/HsuR94
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/integration/HsuR94
Pochang Hsu, Jerzy W. Rozenblit:
A computer-aided design framework for modeling and simulation of VLSI interconnections and packaging. Integr. 17(2): 163-187 (1994)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.