"Improved matrix multiplier design for high-speed digital signal processing ..."

Prabir Saha et al. (2014)

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DOI: 10.1049/IET-CDS.2013.0117

access: closed

type: Journal Article

metadata version: 2023-09-30

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Prabir Saha, Arindam Banerjee, Partha Bhattacharyya, Anup Dandapat:
Improved matrix multiplier design for high-speed digital signal processing applications. IET Circuits Devices Syst. 8(1): 27-37 (2014)

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