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ORCID"A Floorplan-Driven High-Level Synthesis Algorithm for Multiplexer ..."
Koichi Fujiwara et al. (2015)
- Koichi Fujiwara, Kazushi Kawamura, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa
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A Floorplan-Driven High-Level Synthesis Algorithm for Multiplexer Reduction Targeting FPGA Designs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(7): 1392-1405 (2015)
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