"IBM POWER7+ processor on-chip accelerators for cryptography and active ..."

Bart Blaner et al. (2013)

> Home

Details and statistics

DOI: 10.1147/JRD.2013.2280090

access: closed

type: Journal Article

metadata version: 2020-03-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ibmrd/BlanerABCKKLLRS13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ibmrd/BlanerABCKKLLRS13
Bart Blaner, Bülent Abali, Brian M. Bass, Suresh Chari, Ronald N. Kalla, Steven R. Kunkel, Kenneth Lauricella, Ross Leavens, John J. Reilly, Peter A. Sandon:
IBM POWER7+ processor on-chip accelerators for cryptography and active memory expansion. IBM J. Res. Dev. 57(6) (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.