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ORCIDRonald N. Kalla
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2010 – 2019
- 2018
[j10]L. Baba Arimilli, Bart Blaner, Ben C. Drerup, Charles F. Marino, Derek Williams, Eric N. Lais, Francesco A. Campisano, Guy L. Guthrie, Michael S. Floyd, Ross Leavens, Scot M. Willenborg, Ronald N. Kalla, Bülent Abali:
IBM POWER9 processor and system features for computing in the cognitive era. IBM J. Res. Dev. 62(4/5): 1:1-1:11 (2018)- 2017
- [j9]Satish Kumar Sadasivam
, Brian W. Thompto, Ronald N. Kalla, William J. Starke:
IBM Power9 Processor Architecture. IEEE Micro 37(2): 40-51 (2017) - 2015
- [j8]Manoj Dusanapudi, S. Fields, Michael S. Floyd, Guy L. Guthrie, Ronald N. Kalla, Shakti Kapoor, L. S. Leitner, Charles F. Marino, Joseph McGill, Amir Nahir, Kevin Reick, H. Shen, K. L. Wright:
Debugging post-silicon fails in the IBM POWER8 bring-up lab. IBM J. Res. Dev. 59(1) (2015) - 2013
- [j7]Bart Blaner, Bülent Abali, Brian M. Bass, Suresh Chari, Ronald N. Kalla, Steven R. Kunkel, Kenneth Lauricella, Ross Leavens, John J. Reilly, Peter A. Sandon:
IBM POWER7+ processor on-chip accelerators for cryptography and active memory expansion. IBM J. Res. Dev. 57(6) (2013) - 2011
- [j6]Dieter F. Wendel, Ronald N. Kalla, James D. Warnock, Robert Cargnoni, Sam G. Chu, Joachim G. Clabes, Daniel Dreps, David Hrusecky, Joshua Friedrich, Md. Saiful Islam, James A. Kahle, Jens Leenstra, Gaurav Mittal, Jose Paredes, Juergen Pille, Phillip J. Restle, Balaram Sinharoy, George Smith, William J. Starke, Scott A. Taylor, James Van Norstrand, Stephen Weitzel, Phillip G. Williams, Victor V. Zyuban:
POWER7™, a Highly Parallel, Scalable Multi-Core High End Server Processor. IEEE J. Solid State Circuits 46(1): 145-161 (2011) - 2010
- [j5]Ronald N. Kalla, Balaram Sinharoy, William J. Starke, Michael S. Floyd:
Power7: IBM's Next-Generation Server Processor. IEEE Micro 30(2): 7-15 (2010) - [c3]Dieter F. Wendel, Ronald N. Kalla, Robert Cargnoni, Joachim G. Clabes, Joshua Friedrich, Roland Frech, James A. Kahle, Balaram Sinharoy, William J. Starke, Scott A. Taylor, Steve Weitzel, Sam G. Chu, Md. Saiful Islam, Victor V. Zyuban:
The implementation of POWER7TM: A highly parallel and scalable multi-core high-end server processor. ISSCC 2010: 102-103
2000 – 2009
- 2009
- [c2]Ronald N. Kalla, Balaram Sinharoy:
POWER7: IBM's next generation server processor. Hot Chips Symposium 2009: 1-12 - 2008
- [j4]Pia N. Sanda, Jeffrey W. Kellington, Prabhakar Kudva, Ronald N. Kalla, Ryan B. McBeth, Jerry Ackaret, Ryan Lockwood, John Schumann, Christopher R. Jones:
Soft-error resilience of the IBM POWER6 processor. IBM J. Res. Dev. 52(3): 275-284 (2008) - 2005
- [j3]Balaram Sinharoy, Ronald N. Kalla, Joel M. Tendler, Richard J. Eickemeyer, Jody B. Joyner:
POWER5 system microarchitecture. IBM J. Res. Dev. 49(4-5): 505-522 (2005) - 2004
- [j2]Ronald N. Kalla, Balaram Sinharoy, Joel M. Tendler:
IBM Power5 Chip: A Dual-Core Multithreaded Processor. IEEE Micro 24(2): 40-47 (2004) - [c1]Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam G. Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip J. Restle, Ronald N. Kalla, Joseph McGill, J. Steve Dodson:
Design and implementation of the POWER5 microprocessor. DAC 2004: 670-672 - 2000
- [j1]John M. Borkenhagen, Richard J. Eickemeyer, Ronald N. Kalla, Steven R. Kunkel:
A multithreaded PowerPC processor for commercial servers. IBM J. Res. Dev. 44(6): 885-898 (2000)
Coauthor Index
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