"A Method of Formal Verification of Cryptographic Circuits."

Kanji Hirabayashi (1998)

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DOI: 10.1023/A:1008342004877

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type: Journal Article

metadata version: 2020-09-11

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Kanji Hirabayashi:
A Method of Formal Verification of Cryptographic Circuits. J. Electron. Test. 13(3): 321-322 (1998)

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