"Technology Impacts on Sub-90nm CMOS Circuit Design and Design Methodologies."

Ruchir Puri, Tanay Karnik, Rajiv V. Joshi (2006)

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DOI: 10.1109/VLSID.2006.156

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Ruchir Puri, Tanay Karnik, Rajiv V. Joshi:
Technology Impacts on Sub-90nm CMOS Circuit Design and Design Methodologies. VLSI Design 2006: 5-7

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