"A 5nm Wide Voltage Range Ultra High Density SRAM Design for L2/L3 Cache ..."

Sriharsha Enjapuri et al. (2021)

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DOI: 10.1109/VLSID51830.2021.00031

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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Sriharsha Enjapuri, Deepesh Gujjar, Sandipan Sinha, Ramesh Halli, Manish Trivedi:
A 5nm Wide Voltage Range Ultra High Density SRAM Design for L2/L3 Cache Applications. VLSID 2021: 151-156

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