"On Minimization of Test Application Time for RAS."

Raghavendra Adiga et al. (2010)

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DOI: 10.1109/VLSI.DESIGN.2010.61

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Raghavendra Adiga, Gandhi Arpit, Virendra Singh, Kewal K. Saluja, Hideo Fujiwara, Adit D. Singh:
On Minimization of Test Application Time for RAS. VLSI Design 2010: 393-398

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