"A 71. 4dB SNDR 30MHz BW Continuous-Time Delta-sigma Modulator Using a ..."

Chan-Hsiang Weng et al. (2019)

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DOI: 10.23919/VLSIC.2019.8777949

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

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Chan-Hsiang Weng, Tzu-An Wei, Hung-Yi Hsieh, Su-Hao Wu, Ting-Yang Wang:
A 71. 4dB SNDR 30MHz BW Continuous-Time Delta-sigma Modulator Using a Time-Interleaved Noise-Shaping Quantizer in 12-nm CMOS. VLSI Circuits 2019: 228-

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