"Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin, ..."

Jaydeep P. Kulkarni et al. (2020)

> Home

Details and statistics

DOI: 10.1109/VLSICIRCUITS18222.2020.9162822

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsic/KulkarniMATTKD20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/KulkarniMATTKD20
Jaydeep P. Kulkarni, Andres Malavasi, Charles Augustine, Carlos Tokunaga, Jim Tschanz, Muhammad M. Khellah, Vivek De:
Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin, Noise-Tolerant, High-Density, 1R1W 8T-Bitcell SRAM in 10nm FinFET CMOS. VLSI Circuits 2020: 1-2

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.