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ORCID"A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist ..."
Zheng Guo et al. (2020)
- Zheng Guo, Jami Wiedemer, Yusung Kim, Prithvee Sundararajan Ramamoorthy, Prateeksha Bindiganavile Sathyaprasad, Smita Shridharan, Daeyeon Kim, Eric Karl:
A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead. VLSI Circuits 2020: 1-2
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