"Variation-aware and adaptive-latency accesses for reliable low voltage caches."

Po-Hao Wang et al. (2013)

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DOI: 10.1109/VLSI-SOC.2013.6673309

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Po-Hao Wang, Wei-Chung Cheng, Yung-Hui Yu, Tang-Chieh Kao, Chi-Lun Tsai, Pei-Yao Chang, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen:
Variation-aware and adaptive-latency accesses for reliable low voltage caches. VLSI-SoC 2013: 358-363

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