"VLSI-Architecture of Radix-2/4/8 SISO Decoder for Turbo Decoding at ..."

Rahul Shrestha, Ashutosh Sharma (2018)

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DOI: 10.1109/VLSI-SOC.2018.8644753

access: closed

type: Conference or Workshop Paper

metadata version: 2019-02-26

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Rahul Shrestha, Ashutosh Sharma:
VLSI-Architecture of Radix-2/4/8 SISO Decoder for Turbo Decoding at Multiple Data-rates. VLSI-SoC 2018: 131-136

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