"An FPGA-based Hardware Accelerator for Scene Text Character Recognition."

Luiz Antonio de Oliveira Junior, Edna Barros (2018)

> Home

Details and statistics

DOI: 10.1109/VLSI-SOC.2018.8644776

access: closed

type: Conference or Workshop Paper

metadata version: 2019-02-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi/JuniorB18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi/JuniorB18
Luiz Antonio de Oliveira Junior, Edna Barros:
An FPGA-based Hardware Accelerator for Scene Text Character Recognition. VLSI-SoC 2018: 125-130

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.