"Dual-mode double precision / two-parallel single precision floating point ..."

Manish Kumar Jaiswal, Hayden Kwok-Hay So (2015)

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DOI: 10.1109/VLSI-SOC.2015.7314418

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-16

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Manish Kumar Jaiswal, Hayden Kwok-Hay So:
Dual-mode double precision / two-parallel single precision floating point multiplier architecture. VLSI-SoC 2015: 213-218

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