default search action
"Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit Against False ..."
Han-Sheng Huang, Ming-Dou Ker (2021)
- Han-Sheng Huang, Ming-Dou Ker:
Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit Against False Trigger During Fast Power-ON Events. VLSI-DAT 2021: 1-4
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.