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"A Faster Hierarchical Balanced Bipartitioner for VLSI Floorplans Using ..."
Bapi Kar et al. (2012)
- Bapi Kar, Susmita Sur-Kolay, Sridhar H. Rangarajan, Chittaranjan A. Mandal:
A Faster Hierarchical Balanced Bipartitioner for VLSI Floorplans Using Monotone Staircase Cuts. VDAT 2012: 327-336
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