"Pseudo parallel architecture for AES with error correction."

Yi Xin Su et al. (2008)

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DOI: 10.1109/SOCC.2008.4641508

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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Yi Xin Su, Jimson Mathew, Jawar Singh, Dhiraj K. Pradhan:
Pseudo parallel architecture for AES with error correction. SoCC 2008: 187-190

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