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"Generating Core in Rough Set Theory: Design and Implementation on FPGA."

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk (2014)

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DOI: 10.1007/978-3-319-08729-0_20

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-19

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  dblp key:
  - conf/rseisp/KopczynskiGS14
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  - https://dblp.org/rec/conf/rseisp/KopczynskiGS14
Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk:
Generating Core in Rough Set Theory: Design and Implementation on FPGA. RSEISP 2014: 209-216

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