"Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage ..."

Reda Boumchedda et al. (2018)

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DOI: 10.1145/3232195.3232210

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-11

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  dblp key:
  - conf/nanoarch/BoumcheddaNGMRE18
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  - https://dblp.org/rec/conf/nanoarch/BoumcheddaNGMRE18
Reda Boumchedda, Jean-Philippe Noel, Bastien Giraud, Adam Makosiej, Marco Antonio Rios, Eduardo Esmanhotto, Emilien Bourde-Cicé, Mathis Bellet, David Turgis, Edith Beigné:
Energy-Efficient 4T SRAM Bitcell with 2T Read-Port for Ultra-Low-Voltage Operations in 28 nm 3D Monolithic CoolCubeTM Technology. NANOARCH 2018: 131-137

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