"Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area ..."

Bo-Han Li et al. (2024)

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DOI: 10.1109/MWSCAS60917.2024.10658764

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type: Conference or Workshop Paper

metadata version: 2024-10-10

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Bo-Han Li, Kuan-Chih Lin, Hao Zuo, Po-Cheng Pan, Hung-Ming Chen, Shyh-Jye Jou, Chien-Nan Jimmy Liu, Bo-Cheng Lai:
Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization. MWSCAS 2024: 1085-1090

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