"A/MS benchmark circuits for comparing fault simulation, DFT, and test ..."

Stephen Sunter, Peter Sarson (2017)

> Home

Details and statistics

DOI: 10.1109/TEST.2017.8242079

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/itc/SunterS17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/SunterS17
Stephen Sunter, Peter Sarson:
A/MS benchmark circuits for comparing fault simulation, DFT, and test generation methods. ITC 2017: 1-7

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.