"Test Generation for Highly Sequential Scan-Testable Circuits Through Logic ..."

M. Ray Mercer, Vishwani D. Agrawal, Carlos M. Roman (1981)

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type: Conference or Workshop Paper

metadata version: 2002-10-22

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M. Ray Mercer, Vishwani D. Agrawal, Carlos M. Roman:
Test Generation for Highly Sequential Scan-Testable Circuits Through Logic Transformation. ITC 1981: 561-565

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