default search action
"Test Generation for Highly Sequential Scan-Testable Circuits Through Logic ..."
M. Ray Mercer, Vishwani D. Agrawal, Carlos M. Roman (1981)
- M. Ray Mercer, Vishwani D. Agrawal, Carlos M. Roman:
Test Generation for Highly Sequential Scan-Testable Circuits Through Logic Transformation. ITC 1981: 561-565
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.