"7.5 A 3.3ns-access-time 71.2μW/MHz 1Mb embedded STT-MRAM using ..."

Hiroki Noguchi et al. (2015)

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DOI: 10.1109/ISSCC.2015.7062963

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Hiroki Noguchi, Kazutaka Ikegami, Keiichi Kushida, Keiko Abe, Shogo Itai, Satoshi Takaya, Naoharu Shimomura, Junichi Ito, Atsushi Kawasumi, Hiroyuki Hara, Shinobu Fujita:
7.5 A 3.3ns-access-time 71.2μW/MHz 1Mb embedded STT-MRAM using physically eliminated read-disturb scheme and normally-off memory architecture. ISSCC 2015: 1-3

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