"A 32kb 10T Subthreshold SRAM Array with Bit-Interleaving and Differential ..."

Ik Joon Chang et al. (2008)

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DOI: 10.1109/ISSCC.2008.4523220

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Ik Joon Chang, Jae-Joon Kim, Sang Phill Park, Kaushik Roy:
A 32kb 10T Subthreshold SRAM Array with Bit-Interleaving and Differential Read Scheme in 90nm CMOS. ISSCC 2008: 388-389

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