"Integrated VLSI layout compaction and wire balancing on a shared memory ..."

Prasad R. Chalasani, Krishnaiyan Thulasiraman, M. A. Corneau (1994)

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DOI: 10.1109/ISPAN.1994.367165

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/ispan/ChalasaniTC94
Prasad R. Chalasani, Krishnaiyan Thulasiraman, M. A. Corneau:
Integrated VLSI layout compaction and wire balancing on a shared memory multiprocessor: evaluation of a parallel algorithm. ISPAN 1994: 49-56

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