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M. A. Corneau

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1990 – 1999

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1994
[c1]
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  - https://dblp.org/rec/conf/ispan/ChalasaniTC94
Prasad R. Chalasani, Krishnaiyan Thulasiraman, M. A. Corneau:
Integrated VLSI layout compaction and wire balancing on a shared memory multiprocessor: evaluation of a parallel algorithm. ISPAN 1994: 49-56

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