"A 8-bit 300MHz Domino Based Successive Approximation Register ADC."

Ko-Chi Kuo, Hsiung-Yu Chi (2022)

> Home

Details and statistics

DOI: 10.1109/ISOCC56007.2022.10031346

access: closed

type: Conference or Workshop Paper

metadata version: 2023-02-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isocc/KuoC22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isocc/KuoC22
Ko-Chi Kuo, Hsiung-Yu Chi:
A 8-bit 300MHz Domino Based Successive Approximation Register ADC. ISOCC 2022: 47-48

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.